Title :
A programmable highly parallel architecture for digital signal processing
Author :
Mazare, Guy ; Payan, Eric
Author_Institution :
Lab. de Genie Informatique, INPG, Grenoble, France
Abstract :
Integrated circuits for digital signal processing (DP) can roughly be classified into two categories: programmable preprocessors or application-specific integrated circuits. The authors propose an intermediate solution based on a regular array of identical cells which can be programmed with a synchronous declarative language, LUSTRE. The main features of LUSTRE and results of performance studies are given
Keywords :
cellular arrays; digital signal processing chips; parallel architectures; LUSTRE; digital signal processing; identical cells; programmable highly parallel architecture; regular array; synchronous declarative language; Computer network management; Digital integrated circuits; Digital signal processing; Flow graphs; Hardware; Parallel architectures; Phased arrays; Power system reliability; Routing; Signal processing algorithms;
Conference_Titel :
Circuits and Systems, 1989., IEEE International Symposium on
Conference_Location :
Portland, OR
DOI :
10.1109/ISCAS.1989.100602
