• DocumentCode
    1650545
  • Title

    Interfacial layer dependence of HFSIxOy gate stacks on VT instability and charge trapping using ultra-short pulse in characterization

  • Author

    Young, C.D. ; Choi, R. ; Sim, J.H. ; Lee, B.H. ; Zeitzoff, P. ; Zhao, Y. ; Matthews, K. ; Brown, G.A. ; Bersuker, G.

  • Author_Institution
    SEMATECH, Austin, TX, USA
  • fYear
    2005
  • Firstpage
    75
  • Lastpage
    79
  • Keywords
    MOSFET; dielectric thin films; electron traps; hafnium compounds; semiconductor device measurement; 35 ns to 5 ms; DC characteristics degradation; HfSixOx; charge trapping; charging bias dependence; electron trapping; fast transient charging times; gate stack interfacial layer dependence; high-k transistors; interfacial layer thickness; nMOS transistors; threshold voltage instability; trap-free pulse I-V characteristics; ultra-short pulse I-V characterization; Annealing; Degradation; Dielectrics; Electron traps; Oscilloscopes; Pulse generation; Pulse measurements; Pulse shaping methods; Space vector pulse width modulation; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Reliability Physics Symposium, 2005. Proceedings. 43rd Annual. 2005 IEEE International
  • Print_ISBN
    0-7803-8803-8
  • Type

    conf

  • DOI
    10.1109/RELPHY.2005.1493066
  • Filename
    1493066
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1650545