DocumentCode
1651252
Title
Reliability assessment of discrete-trap memories for NOR applications
Author
Compagnoni, C. Monzio ; Ielmini, D. ; Spinelli, A.S. ; Lacaita, A.L. ; Sotgiu, R.
Author_Institution
Dipt. di Elettronica e Informazione, Univ. di Milano, Italy
fYear
2005
Firstpage
240
Lastpage
245
Keywords
NOR circuits; charge exchange; hot carriers; nanostructured materials; semiconductor device reliability; semiconductor storage; NOR architecture; bake-accelerated retention tests; channel hot-electron injection; charge localization; charge migration; charge transfer; discrete-trap memories; drain disturb; drain turn; junction edges; nanocrystal memory cells; nitride memory cells; reading drain voltages; reliability; state-of-art flash cells; threshold voltage loss; Channel hot electron injection; Degradation; MOSFET circuits; Material storage; Nanocrystals; Reliability theory; Sociotechnical systems; Testing; Threshold voltage; Tunneling;
fLanguage
English
Publisher
ieee
Conference_Titel
Reliability Physics Symposium, 2005. Proceedings. 43rd Annual. 2005 IEEE International
Print_ISBN
0-7803-8803-8
Type
conf
DOI
10.1109/RELPHY.2005.1493091
Filename
1493091
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