DocumentCode :
1651344
Title :
Hierarchical management of VLSI cells at different description levels
Author :
Barzaghi, M. ; Bisio, G.M. ; Caviglia, D.D. ; Marchesi, M. ; Curatelli, F.
Author_Institution :
DIBE, Genova Univ., Italy
fYear :
1991
Firstpage :
327
Abstract :
The implementation of a data structure that permits a VLSI designer to operate at different description levels during the design of a chip is addressed. This data structure has been realized using software tools like object-oriented programming, which allow the creation of very modular programs. For the input/output program operations, the EDIF format has been used. To manage the data structure, suitable graphics, which permit the user to access data structure through the use of windows and menus, have been developed
Keywords :
VLSI; circuit CAD; data structures; object-oriented programming; software tools; user interfaces; EDIF format; VLSI cells; data structure; description levels; input/output program operations; menus; object-oriented programming; software tools; windows; Bioinformatics; Circuits and systems; Data structures; Design automation; Flexible printed circuits; Genomics; Graphics; Object oriented programming; Software tools; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrotechnical Conference, 1991. Proceedings., 6th Mediterranean
Conference_Location :
LJubljana
Print_ISBN :
0-87942-655-1
Type :
conf
DOI :
10.1109/MELCON.1991.161843
Filename :
161843
Link To Document :
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