DocumentCode
1651364
Title
Using microbenchmarks to evaluate system performance
Author
Bershad, Brian N. ; Draves, Richard P. ; Forin, Alessandro
Author_Institution
Sch. of Comput. Sci., Carnegie Mellon Univ., Pittsburgh, PA, USA
fYear
1992
Firstpage
148
Lastpage
153
Abstract
An implicit assumption underlying the use of microbenchmarks is that the time required for the microbenchmark to exercise the code path in question is the same as it when the code path is used by real programs. The vulnerability of this assumption is demonstrated by showing the significant variation that can occur with even simple microbenchmarks. The behavior of cache memory can distort the performance of a microbenchmark. Cache collisions can occur between memory in the same address space, or between memory in different address spaces. Flushing the cache while running a microbenchmark and counting memory accesses, rather than instructions, are two techniques for reducing the variability of results. It is stressed that it is important to understand low-level details about architectural implementation when interpreting microbenchmarks
Keywords
buffer storage; operating systems (computers); performance evaluation; program testing; address spaces; cache collisions; cache memory; code path; counting memory accesses; microbenchmarks; system performance; Cache memory; Computer science; Concurrent computing; Contracts; Fault diagnosis; Government; Information science; Protection; Reduced instruction set computing; System performance;
fLanguage
English
Publisher
ieee
Conference_Titel
Workstation Operating Systems, 1992. Proceedings., Third Workshop on
Conference_Location
Key Biscayne, FL
Print_ISBN
0-8186-2555-4
Type
conf
DOI
10.1109/WWOS.1992.275671
Filename
275671
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