DocumentCode
1651371
Title
Voltage Island Aware Floorplanning for Power and Timing Optimization
Author
Lee, Wan-Ping ; Liu, Hung-Yi ; Chang, Yao-Wen
Author_Institution
Graduate Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei
fYear
2006
Firstpage
389
Lastpage
394
Abstract
Power consumption is a crucial concern in nanometer chip design. Researchers have shown that multiple supply voltage (MSV) is an effective method for power consumption reduction. The underlying idea behind MSV is the trade-off between power saving and performance. In this paper, we present an effective voltage assignment technique based on dynamic programming. Given a netlist without reconvergent fanouts, the dynamic programming can guarantee an optimal solution for the voltage assignment. We then generate a level shifter for each net that connects two blocks in different voltage domains, and perform power-network aware floorplanning for the MSV design. Experimental results show that our floorplanner is very effective in optimizing power consumption under timing constraints
Keywords
circuit layout; circuit optimisation; dynamic programming; power aware computing; dynamic programming; multiple supply voltage; nanometer chip design; power consumption; power optimization; power-network aware floorplanning; timing optimization; voltage assignment; voltage island aware floorplanning; CMOS technology; Chip scale packaging; Constraint optimization; Dynamic programming; Energy consumption; Frequency; Permission; Power generation; Timing; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer-Aided Design, 2006. ICCAD '06. IEEE/ACM International Conference on
Conference_Location
San Jose, CA
ISSN
1092-3152
Print_ISBN
1-59593-389-1
Electronic_ISBN
1092-3152
Type
conf
DOI
10.1109/ICCAD.2006.320063
Filename
4110203
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