• DocumentCode
    1651643
  • Title

    Accurate source-level simulation of embedded software with respect to compiler optimizations

  • Author

    Wang, Zhonglei ; Henkel, Jörg

  • Author_Institution
    Embedded Sytems, Karlsruhe Inst. of Technol., Karlsruhe, Germany
  • fYear
    2012
  • Firstpage
    382
  • Lastpage
    387
  • Abstract
    Source code instrumentation is a widely used method to generate fast software simulation models by annotating timing information into application source code. Source-level simulation models can be easily integrated into SystemC based simulation environment for fast simulation of complex multiprocessor systems. The accurate back-annotation of the timing information relies on the mapping between source code and binary code. The compiler optimizations might make it hard to get accurate mapping information. This paper addresses the mapping problems caused by complex compiler optimizations, which are the main source of simulation errors. To obtain accurate mapping information, we propose a method called fine-grained flow mapping that establishes a mapping between sequences of control flow of source code and binary code. In case that the code structure of a program is heavily altered by compiler optimizations, we propose to replace the altered part of the source code with functionally-equivalent IR-level code which has an optimized structure, leading to Partly Optimized Source Code (POSC). Then the flow mapping can be established between the POSC and the binary code and the timing information is back-annotated to the POSC. Our experiments demonstrate the accuracy and speed of simulation models generated by our approach.
  • Keywords
    C++ language; digital simulation; multiprocessing systems; program compilers; IR-level code; POSC; SystemC based simulation environment; application source code; compiler optimizations; complex multiprocessor system simulation; embedded software; fine-grained flow mapping; partly optimized source code; software simulation models; source code instrumentation; source code-binary code control flow; source code-binary code mapping; source-level simulation model; timing information back-annotation; Accuracy; Binary codes; Debugging; Instruments; Optimization; Timing; Transforms;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation & Test in Europe Conference & Exhibition (DATE), 2012
  • Conference_Location
    Dresden
  • ISSN
    1530-1591
  • Print_ISBN
    978-1-4577-2145-8
  • Type

    conf

  • DOI
    10.1109/DATE.2012.6176501
  • Filename
    6176501