A reconfigurable system for digital signal processing

Author

Letian, Huang ; Guangjun, Li

Author_Institution

Sch. of Commun. & Inf. Eng., Electron. Sci. & Technol. Univ. of China (UESTC), Chengdu

fYear

2008

Firstpage

439

Lastpage

442

Abstract

Commonality of various algorithms is analyzed based on the research of algorithms commonly used digital signal processing and a reconfigurable cell is proposed. A reconfigurable system with the cells is designed, which is widely used in a variety of digital signal processing. The principle and method of using this system are discussed with the basic algorithms of digital signal processing - multiplication and adder - as example. By means of simulation and implementation, it is found that this system has much higher processing speed and efficiency, compared with other kinds of GM multipliers.

Keywords

adders; digital arithmetic; digital signal processing chips; multiplying circuits; programmable circuits; GM multiplier; adder circuit; digital signal processing algorithm; multiplication-addition operation; reconfigurable cell digital signal processing system; Algorithm design and analysis; Computational modeling; Computer architecture; Digital filters; Digital signal processing; Digital systems; Discrete Fourier transforms; Discrete cosine transforms; Signal analysis; Signal processing algorithms; algorithms; cell; digital signal processing; multiplier; reconfiguration system;

fLanguage

English

Publisher

ieee

Conference_Titel

Signal Processing, 2008. ICSP 2008. 9th International Conference on

Conference_Location

Beijing

Print_ISBN

978-1-4244-2178-7

Electronic_ISBN

978-1-4244-2179-4

Type

conf

DOI

10.1109/ICOSP.2008.4697165

Filename

4697165