DocumentCode
1652043
Title
Critical address aligning issues in real time DSP image processing system
Author
Jin Wei ; Teng Long
Author_Institution
Radar Technol. Res. Lab., Beijing Inst. of Technol., Beijing
fYear
2008
Firstpage
462
Lastpage
465
Abstract
This paper focuses on the critical address aligning issues in real time DSP image processing system. SAD and byte array moving operation which are quite sensitive to the address aligning issues are discussed thoroughly, and get well solved. At the end of the paper, we present an optimized design and implementation of the template matching real time image processing system based on the high performance TigerSHARC DSP COTS module and the solution of severe address aligning issues.
Keywords
digital signal processing chips; image matching; TigerSHARC DSP COTS module; byte array; critical address aligning; design optimisation; real time DSP image processing system; template matching; Design optimization; Digital signal processing; Image processing; Laboratories; Parallel processing; Radar imaging; Radar signal processing; Real time systems; Signal processing algorithms; Sonar; TigerSHARC; address aligning; image processing; real time;
fLanguage
English
Publisher
ieee
Conference_Titel
Signal Processing, 2008. ICSP 2008. 9th International Conference on
Conference_Location
Beijing
Print_ISBN
978-1-4244-2178-7
Electronic_ISBN
978-1-4244-2179-4
Type
conf
DOI
10.1109/ICOSP.2008.4697170
Filename
4697170
Link To Document