Title :
New ballasting method for MOS output drivers and power bus clamps
Author :
Worley, Eugene R.
Author_Institution :
Conexant Syst., Newport Beach, CA, USA
Keywords :
driver circuits; electrostatic discharge; power MOSFET; MOS output drivers; MOSFET; N well ring; NFET P+ substrate tie ring; channel-substrate resistance; drain capacitance; output driver NFET; output driver ballasting method; power bus ESD clamps; reduced layout area ballasting; snap-back conduction uniformity; Capacitance; Clamps; Current density; Electronic ballasts; Electrostatic discharge; Immune system; MOSFET circuits; Power MOSFET; Resistors; Silicon;
Conference_Titel :
Reliability Physics Symposium, 2005. Proceedings. 43rd Annual. 2005 IEEE International
Print_ISBN :
0-7803-8803-8
DOI :
10.1109/RELPHY.2005.1493128
