A comprehensive methodology and model for the characterization of hot-carrier induced MOS device degradation

One of the main concerns in the submicron MOS technologies is the device lifetime associated with the hot carrier injection into the gate oxide due to the high electric fields on the drain/source terminals or across the channel. Many previous works have been devoted to the MOS device degradation theory and the lifetime prediction. This paper, on the other hand, presents a comprehensive methodology and model for hot-carrier stressing and lifetime characterization. Since the model takes into account the lifetime dependence on the channel length and the applied drain voltage, the transistor lifetime for different MOS geometries under various drain voltages can be easily determined. This model is useful to determine the channel length that will provide 10-20 years DC lifetime for the MOS technologies, where the lifetime for the minimum channel length is much less than 10 years