DocumentCode
1652429
Title
A viable and comprehensive TDDB assessment methodology for investigation of SRAM Vmin failure
Author
Wu, E. ; Braceras, G. ; Turner, D. ; Swift, A. ; Johnson, M. ; Suñé, J. ; Tous, S. ; Li, B. ; Bolam, R. ; Massey, G. ; Khare, M.
Author_Institution
IBM Syst. & Technol. Group, Essex Junction, VT, USA
fYear
2009
Firstpage
1
Lastpage
4
Abstract
Based on fundamental understanding of oxide breakdown (BD) physics established for thin oxides, we demonstrate that product circuit malfunction such as SRAM Vmin failure due to intrinsic TDDB can be accurately predicted. This prediction is based on a viable methodology using power-law voltage acceleration and progressive BD.
Keywords
SRAM chips; semiconductor device breakdown; SRAM failure; TDDB assessment methodology; oxide breakdown physics; power-law voltage acceleration; thin oxides; Acceleration; Built-in self-test; Circuit simulation; Engines; Performance evaluation; Physics; Random access memory; Stress; Testing; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting (IEDM), 2009 IEEE International
Conference_Location
Baltimore, MD
Print_ISBN
978-1-4244-5639-0
Electronic_ISBN
978-1-4244-5640-6
Type
conf
DOI
10.1109/IEDM.2009.5424340
Filename
5424340
Link To Document