• DocumentCode
    1652969
  • Title

    SystemC based architecture exploration of a 3D graphic processor

  • Author

    Kogel, Tim ; Wieferink, Andreas ; Meyr, Heinrich ; Kroll, Andrea

  • Author_Institution
    Integrated Signal Process. Syst., Aachen Univ. of Technol., Germany
  • fYear
    2001
  • fDate
    6/23/1905 12:00:00 AM
  • Firstpage
    169
  • Lastpage
    176
  • Abstract
    We propose a system level design and refinement methodology based on the SystemC class library. We address design space exploration and performance profiling at the highest possible level of abstraction. System level design starts with the initial functional specification and validation of the system behavior in SystemC. The refinement methodology covers architecture exploration and results in an executable system architecture model, which is able to generate the relevant profiling data and to verify if the chosen architecture meets the performance requirements. We have applied this methodology to a 100 million gate design of a 3D graphic processor. We were able to demonstrate the feasibility and define the final system architecture within 2 months. This 3D processor implements the ray-tracing rendering paradigm on one chip allowing real time rendering of 3D scenes with photo-realistic quality. Based on the results of this case study, we present the benefits of our methodology to define successively a feasible system architecture coping with the processing and memory bandwidth requirements
  • Keywords
    application specific integrated circuits; electronic design automation; hardware-software codesign; integrated circuit design; logic CAD; microprocessor chips; ray tracing; realistic images; rendering (computer graphics); 3D graphic processor; 3D scenes; SystemC class library; design space exploration; executable system architecture model; hardware/software partitioning; hardware/software synthesis; memory bandwidth requirements; performance profiling; photo-realistic quality; processing requirements; profiling data; ray-tracing rendering paradigm; real time rendering; system level design; system-on-chip design projects; Computer architecture; Graphics; Hardware; Libraries; Ray tracing; Rendering (computer graphics); Signal processing; Space exploration; Space technology; System-level design;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signal Processing Systems, 2001 IEEE Workshop on
  • Conference_Location
    Antwerp
  • ISSN
    1520-6130
  • Print_ISBN
    0-7803-7145-3
  • Type

    conf

  • DOI
    10.1109/SIPS.2001.957344
  • Filename
    957344