Dual channel FinFETs as a single high-k/metal gate solution beyond 22nm node

Author

Smith, C.E. ; Adhikari, H. ; Lee, S.-H. ; Coss, B. ; Parthasarathy, S. ; Young, C. ; Sassman, B. ; Cruz, M. ; Hobbs, C. ; Majhi, P. ; Kirsch, P.D. ; Jammy, R.

Author_Institution

SEMATECH, Austin, TX, USA

fYear

2009

Firstpage

1

Lastpage

4

Abstract

We report on the promise of dual channel materials using FinFETs for high-performance CMOS for sub 22 nm technology node. We demonstrate pFinFETs with all SiGe channel formed by Germanium condensation onto a Silicon-On-Insulator carrier wafer (SiGeOI) followed by cMOS processing. The devices exhibit 3.6X hole mobility enhancement over Silicon (100) while allowing for V_TH control with single high-k and metal gate stack. These attributes taken together constitute a simple non-planar cMOS integration sequence with enhanced drive current for future high performance technology nodes.

Keywords

CMOS integrated circuits; Ge-Si alloys; MOSFET; hole mobility; semiconductor materials; silicon-on-insulator; CMOS processing; FinFET; SiGe; dual channel materials; enhanced drive current; germanium condensation; high-k/metal gate solution; hole mobility enhancement; nonplanar CMOS integration sequence; silicon-on-insulator carrier wafer; size 22 nm; CMOS process; CMOS technology; Capacitive sensors; Crystallization; FinFETs; Germanium silicon alloys; High K dielectric materials; High-K gate dielectrics; Silicon germanium; Silicon on insulator technology;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting (IEDM), 2009 IEEE International

Conference_Location

Baltimore, MD

Print_ISBN

978-1-4244-5639-0

Electronic_ISBN

978-1-4244-5640-6

Type

conf

DOI

10.1109/IEDM.2009.5424363

Filename

5424363