DocumentCode :
1653077
Title :
Hardware/software co-design of an elliptic curve public-key cryptosystem
Author :
Janssens, S. ; Thomas, J. ; Borremans, W. ; Gijsels, P. ; Verbauwhede, I. ; Vercauteren, F. ; Preneel, B. ; Vandewalle, J.
Author_Institution :
ESAT/COSIC, Katholieke Univ., Leuven, Heverlee, Belgium
fYear :
2001
fDate :
6/23/1905 12:00:00 AM
Firstpage :
209
Lastpage :
216
Abstract :
This contribution discusses an implementation of an elliptic curve public-key cryptosystem on the Atmel FPSLIC, a system on a chip (SOC) that integrates a 40 K FPGA with an AVR microcontroller and a set of peripherals. The FPGA is ideally suited for an efficient implementation of the underlying finite field arithmetic. The software benefits the global control. We use a standard basis representation for the field elements and projective coordinates to implement the group operation. The results for area are comparable with existing hardware implementations. Although no attempts have been made yet to reduce the critical path delay of the hardware part, we obtained promising results towards speed and throughput. A clock frequency of 10 MHz is realized, but a lot more must be possible after optimization
Keywords :
Galois fields; field programmable gate arrays; hardware-software codesign; integrated circuit design; public key cryptography; 10 MHz; AVR microcontroller; Atmel FPSLIC; FPGA; basis representation; clock frequency; critical path delay; elliptic curve public key cryptosystem; field elements; finite field arithmetic; global control; group operation; projective coordinates; system on a chip; Arithmetic; Delay; Elliptic curves; Field programmable gate arrays; Galois fields; Hardware; Microcontrollers; Public key; Public key cryptography; System-on-a-chip;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal Processing Systems, 2001 IEEE Workshop on
Conference_Location :
Antwerp
ISSN :
1520-6130
Print_ISBN :
0-7803-7145-3
Type :
conf
DOI :
10.1109/SIPS.2001.957349
Filename :
957349
Link To Document :
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