• DocumentCode
    1653166
  • Title

    ESD protection window targeting using LDMOS-SCR devices with PWELL-NWELL super-junction

  • Author

    Vashchenko, V.A. ; Beek, M. Ter

  • Author_Institution
    Nat. Semicond. Corp., Santa Clara, CA, USA
  • fYear
    2005
  • Firstpage
    612
  • Lastpage
    613
  • Keywords
    CMOS analogue integrated circuits; bipolar analogue integrated circuits; electrostatic discharge; protection; quantum well devices; semiconductor quantum wells; thyristors; CMOS process regions; ESD protection window targeting; LDMOS-SCR devices; PWELL-NWELL super-junction; breakdown voltage; discrete power devices; extended drain; extended voltage lateral BJT devices; nonself-aligned devices; self-aligned lateral DMOS devices; triggering characteristics; CMOS process; Costs; Current measurement; Electrostatic discharge; Pins; Protection; Pulse measurements; Testing; Thyristors; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Reliability Physics Symposium, 2005. Proceedings. 43rd Annual. 2005 IEEE International
  • Print_ISBN
    0-7803-8803-8
  • Type

    conf

  • DOI
    10.1109/RELPHY.2005.1493168
  • Filename
    1493168
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1653166