1653166

ESD protection window targeting using LDMOS-SCR devices with PWELL-NWELL super-junction

Vashchenko, V.A. ; Beek, M. Ter

Nat. Semicond. Corp., Santa Clara, CA, USA

2005

612

613

CMOS analogue integrated circuits; bipolar analogue integrated circuits; electrostatic discharge; protection; quantum well devices; semiconductor quantum wells; thyristors; CMOS process regions; ESD protection window targeting; LDMOS-SCR devices; PWELL-NWELL super-junction; breakdown voltage; discrete power devices; extended drain; extended voltage lateral BJT devices; nonself-aligned devices; self-aligned lateral DMOS devices; triggering characteristics; CMOS process; Costs; Current measurement; Electrostatic discharge; Pins; Protection; Pulse measurements; Testing; Thyristors; Voltage;

English

ieee

Reliability Physics Symposium, 2005. Proceedings. 43rd Annual. 2005 IEEE International

0-7803-8803-8

conf

10.1109/RELPHY.2005.1493168

1493168