DocumentCode
1653170
Title
Comparison of branching CORDIC implementations
Author
Singh, Abhishek ; Phatak, Dhananjay S. ; Goff, Tom ; Riggs, Mike ; Plusquellic, James ; Patel, Chintan
Author_Institution
Comput. Sci. & Electr. Eng. Dept., Univ. of Maryland Baltimore County, MD, USA
fYear
2003
Firstpage
215
Lastpage
225
Abstract
We compare implementations of Duprat and Muller´s branching CORDIC and Phatak´s double step branching (DSB)-CORDIC algorithms for sine and cosine evaluation. For reference we also report on classical CORDIC implementations for the same wordlengths. We have also implemented double stepping in the classical algorithm and report on the performance of this method. CORDIC evaluation of sine and cosine includes two parts, the zeroer and the rotator. We discuss implementation issues related to the minimization of the delay of each iteration of the algorithm (including delays for both the zeroer as well the rotator). We then examine hybrid methods that select the components from different algorithms (such as a DSB zeroer together with a classical rotator or vice versa).
Keywords
digital arithmetic; branching CORDIC implementation; cosine evaluation; double step branching; hybrid method; iteration delay minimization; sine evaluation; Computer science; Delay; Equations; Minimization methods;
fLanguage
English
Publisher
ieee
Conference_Titel
Application-Specific Systems, Architectures, and Processors, 2003. Proceedings. IEEE International Conference on
ISSN
2160-0511
Print_ISBN
0-7695-1992-X
Type
conf
DOI
10.1109/ASAP.2003.1212845
Filename
1212845
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