1653246

Study of silicon-nitride induced damage on thin gate oxide

Dong, Walden ; Zhou, Joyce ; Liao, Scott ; Niou, Chomg ; Chien, W. T Kary

Reliability Div., SMIC, Shanghai, China

2005

616

617

CMOS logic circuits; failure analysis; integrated circuit reliability; isolation technology; semiconductor device reliability; silicon; silicon compounds; stress effects; 0.15 micron; CMOS logic process; IC process; Si; SiN; failure analysis; nitride silicate; reliability; shallow trench isolation etching step; silicon process qualification; silicon substrate; silicon-nitride induced damage; stress; substrate; thin gate oxide integrity; CMOS logic circuits; CMOS process; Etching; Failure analysis; Performance evaluation; Scanning electron microscopy; Silicon; Temperature; Testing; Voltage;

English

ieee

Reliability Physics Symposium, 2005. Proceedings. 43rd Annual. 2005 IEEE International

0-7803-8803-8

conf

10.1109/RELPHY.2005.1493170

1493170