• DocumentCode
    1653253
  • Title

    A real-time HDTV video decoder

  • Author

    Ling, Nam ; Wang, Nien-Tsu

  • Author_Institution
    Comput. Eng. Dept., Santa Clara Univ., CA, USA
  • fYear
    2001
  • fDate
    6/23/1905 12:00:00 AM
  • Firstpage
    259
  • Lastpage
    270
  • Abstract
    We present an architecture for real-time digital HDTV video decoding. Our technique is based on a dual decoding datapath controlled in a fixed schedule with an efficient write-back scheme for anchor pictures. Unlike other decoding approaches such as the slice bar decoding method and the crossing-divided method, our scheme reduces the memory access contention problem to achieve real-time HDTV decoding without a high cost in overall decoder buffers, architecture, and bus. Our simulation shows that with a relatively low rate 81 MHz clock, our decoder can decode MPEG-2 MP@HL HDTV in real-time, based on an ATSC video format of 1920×1080 pixels/frame at 30 frames/s, at a bit rate of 18 to 20 Mbit/s
  • Keywords
    decoding; digital video broadcasting; high definition television; real-time systems; television standards; 18 to 20 Mbit/s; 81 MHz; ATSC video format; Advanced Television Systems Committee; MPEG-2 MP@HL HDTV; anchor pictures; digital HDTV; dual decoding datapath; memory access contention; real-time video decoding; write-back scheme; Costs; Decoding; Digital TV; Digital multimedia broadcasting; Digital video broadcasting; Engines; HDTV; Processor scheduling; TV broadcasting; Video compression;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signal Processing Systems, 2001 IEEE Workshop on
  • Conference_Location
    Antwerp
  • ISSN
    1520-6130
  • Print_ISBN
    0-7803-7145-3
  • Type

    conf

  • DOI
    10.1109/SIPS.2001.957354
  • Filename
    957354