DocumentCode
1653481
Title
Development of graphene FETs for high frequency electronics
Author
Lin, Yu-Ming ; Jenkins, Keith ; Farmer, Damon ; Valdes-Garcia, Alberto ; Avouris, Phaedon ; Sung, Chun-Yung ; Chiu, Hsin-Ying ; Ek, Bruce
Author_Institution
IBM T. J. Watson Res. Center, Yorktown Heights, NY, USA
fYear
2009
Firstpage
1
Lastpage
4
Abstract
Recent advances in fabricating, measuring, and modeling of top-gated graphene FETs for high-frequency electronics are reviewed. By improving the oxide deposition process and reducing series resistance, an intrinsic cut-off frequency as high as 50 GHz is achieved in a 350-nm-gate graphene FET at a drain bias of 0.8 V. This fT value is the highest frequency reported to date for any graphene transistor, and it also exceeds that of Si MOSFETs at the same gate length, illustrating the potential of graphene for RF applications.
Keywords
field effect transistors; field effect transistor; graphene transistor; high frequency electronics; intrinsic cut off frequency; oxide deposition process; series resistance; size 350 nm; top gated graphene FET; voltage 0.8 V; Circuit synthesis; Current measurement; Cutoff frequency; Density measurement; Electrical resistance measurement; FETs; Frequency measurement; Gain measurement; MOSFETs; Silicon carbide;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting (IEDM), 2009 IEEE International
Conference_Location
Baltimore, MD
Print_ISBN
978-1-4244-5639-0
Electronic_ISBN
978-1-4244-5640-6
Type
conf
DOI
10.1109/IEDM.2009.5424378
Filename
5424378
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