DocumentCode :
1653605
Title :
A cryptographic processor for arbitrary elliptic curves over GF(2m)
Author :
Eberle, Hans ; Gura, Nils ; Chang-Shantz, Sheueling
Author_Institution :
Sun Microsystems Labs., USA
fYear :
2003
Firstpage :
444
Lastpage :
454
Abstract :
We describe a cryptographic processor for elliptic curve cryptography (ECC). ECC is evolving as an attractive alternative to other public-key schemes such as RSA by offering the smallest key size and the highest strength per bit. The processor performs point multiplication for elliptic curves over binary polynomial fields GF(2m). In contrast to other designs that only support one curve at a time, our processor is capable of handling arbitrary curves without requiring reconfiguration. More specifically, it can handle both named curves as standardized by NIST as well as any other generic curves up to a field degree of 255. Efficient support for arbitrary curves is particularly important for the targeted server applications that need to handle requests for secure connections generated by a multitude of heterogeneous client devices. Such requests may specify curves which are infrequently used or not even known at implementation time. Our processor implements 256 bit modular multiplication, division, addition and squaring. The multiplier constitutes the core function as it executes the bulk of the point multiplication algorithm. We present a novel digit-serial modular multiplier that uses a hybrid architecture to perform the reduction operation needed to reduce the multiplication result: hardwired logic is used for fast reduction of named curves and the multiplier circuit is reused for reduction of generic curves. The performance of our FPGA-based prototype, running at a clock frequency of 66.4 MHz, is 6955 point multiplications per second for named curves over GF(2163) and 3308 point multiplications per second for generic curves over GF(2163).
Keywords :
client-server systems; digital arithmetic; field programmable gate arrays; public key cryptography; FPGA-based prototype; RSA; binary polynomial field; clock frequency; cryptographic processor; digit-serial modular multiplier; elliptic curve cryptography; generic curve; hardwired logic; heterogeneous client device; hybrid architecture; modular addition; modular division; modular multiplication; modular squaring; multiplier circuit; point multiplication; point multiplication algorithm; public-key scheme; reduction operation; Cryptography;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Application-Specific Systems, Architectures, and Processors, 2003. Proceedings. IEEE International Conference on
ISSN :
2160-0511
Print_ISBN :
0-7695-1992-X
Type :
conf
DOI :
10.1109/ASAP.2003.1212867
Filename :
1212867
Link To Document :
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