• DocumentCode
    1653673
  • Title

    200 Mbit/s 4-symbol arithmetic encoder architecture for embedded zero tree-based compression

  • Author

    Osorio, Roberto R. ; Vanhoof, Bart

  • fYear
    2001
  • fDate
    6/23/1905 12:00:00 AM
  • Firstpage
    397
  • Lastpage
    405
  • Abstract
    In state-of-the-art multimedia compression standards, arithmetic coding is widely used as a powerful entropy compression method. In the MPEG-4 standard a specific 4-symbol, multiple-context arithmetic coder is used for wavelet based image compression. We present an architecture capable of processing close to 1 symbol per cycle, managing a multiple context in a simple, yet cost-efficient manner. A peak performance of 200 Mbit/s is achieved when clocking this architecture at 100 MHz
  • Keywords
    arithmetic codes; circuit CAD; code standards; data compression; entropy codes; image coding; telecommunication standards; transform coding; wavelet transforms; 100 MHz; 200 Mbit/s; 4-symbol arithmetic encoder architecture; C++ based design; MPEG-4 standard; RAM; architecture; embedded zero tree-based compression; entropy compression; entropy compression method; finite state machine; multimedia compression standards; multiple-context arithmetic coder; wavelet based image compression; Arithmetic; Code standards; Electronic mail; Entropy; Hardware; Image coding; Iterative algorithms; MPEG 4 Standard; Propagation losses; Switches;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signal Processing Systems, 2001 IEEE Workshop on
  • Conference_Location
    Antwerp
  • ISSN
    1520-6130
  • Print_ISBN
    0-7803-7145-3
  • Type

    conf

  • DOI
    10.1109/SIPS.2001.957367
  • Filename
    957367