1653876

A voltage acceleration lifetime model to predict post-cycling LTDR characteristics of split-gate flash memories

Hu, Ling-Chang ; Kang, An-Chi ; Wu, T.I. ; Chen, Eric ; Shih, J.R. ; Chin, H.W. ; Lin, Yao-Feng ; Wu, Kenneth ; King, Ya-Chin

Dept. of Electr. Eng., Nat. Tsing-Hua Univ., Hsin-Chu, Taiwan

2005

664

665

flash memories; integrated circuit testing; life testing; stress effects; charge gain effect; post-cycling low temperature data retention lifetime; split-gate flash memories; thicker gate oxide products; trap-assist-tunneling regime; voltage acceleration lifetime model; word-line stress; Acceleration; Electron traps; Flash memory; Lifetime estimation; Predictive models; Split gate flash memory cells; Stress; Tunneling; Voltage; Weibull distribution;

English

ieee

Reliability Physics Symposium, 2005. Proceedings. 43rd Annual. 2005 IEEE International

0-7803-8803-8

conf

10.1109/RELPHY.2005.1493194

1493194