• DocumentCode
    1653979
  • Title

    How much mismatch should be simulated in the high density SRAM sense amplifier design

  • Author

    Peng, Tao

  • Author_Institution
    New England Design Center, Cypress Semicond. Corp, Nashua, NH, USA
  • fYear
    2005
  • Firstpage
    672
  • Lastpage
    673
  • Keywords
    SRAM chips; amplifiers; circuit simulation; delays; integrated circuit design; integrated circuit yield; semiconductor device models; statistical analysis; circuit architecture; high density SRAM sense amplifier design; memory density; mismatch delay sensitivity; speed yield; static RAM; statistical model; Circuit simulation; Delay; Doping; MOS devices; MOSFET circuits; Probability; Random access memory; Semiconductor optical amplifiers; Semiconductor process modeling; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Reliability Physics Symposium, 2005. Proceedings. 43rd Annual. 2005 IEEE International
  • Print_ISBN
    0-7803-8803-8
  • Type

    conf

  • DOI
    10.1109/RELPHY.2005.1493198
  • Filename
    1493198
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1653979