DocumentCode
1654067
Title
A block-level flash memory management scheme for reducing write activities in PCM-based embedded systems
Author
Liu, Duo ; Wang, Tianzheng ; Wang, Yi ; Qin, Zhiwei ; Shao, Zili
Author_Institution
Dept. of Comput., Hong Kong Polytech. Univ., Kowloon, China
fYear
2012
Firstpage
1447
Lastpage
1450
Abstract
This paper targets at an embedded system with phase change memory (PCM) and NAND flash memory. Although PCM is a promising main memory alternative and is recently introduced to embedded system designs, its endurance keeps drifting down and greatly limits the lifetime of the whole system. Therefore, this paper presents a block-level flash memory management scheme, WAB-FTL, to effectively manage NAND flash memory while reducing write activities of the PCM-based embedded systems. The basic idea is to preserve each bit in flash mapping table hosted by PCM from being inverted frequently during the process of mapping table update. To achieve this, a new merge strategy is adopted in WAB-FTL to delay the mapping table update, and a tiny mapping buffer is used for caching frequently updated mapping records. Experimental results based on Android traces show that WAB-FTL can effectively reduce write activities when compared with the baseline scheme.
Keywords
NAND circuits; embedded systems; flash memories; phase change memories; Android traces; NAND flash memory; PCM-based embedded systems; WAB-FTL; block-level flash memory management scheme; phase change memory; write activities; Ash; Embedded systems; Memory management; Phase change materials; Phase change memory; Random access memory; Smart phones; NAND flash memory; Phase change memory; endurance; flash translation layer; write activity;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2012
Conference_Location
Dresden
ISSN
1530-1591
Print_ISBN
978-1-4577-2145-8
Type
conf
DOI
10.1109/DATE.2012.6176593
Filename
6176593
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