A memristor-based memory cell with no refresh

This paper analyzes and improves the performance of a hybrid memory cell consisting of a memristor and ambipolar transistors. This work extends a previous design by efficiently biasing the memristor (as controlled by the ambipolar transistors), such that no refresh operation is now required. By utilizing macroscopic models, the features of the cell are characterized for the memory operations and no modification is needed to the cell circuit other than the memristor biasing scheme. A detailed treatment of the memory cell with respect to the new biasing scheme of the memristor is provided. Simulation results show that the proposed memory cell has superior performance compared with the previous memristor-based cell.