• DocumentCode
    1654172
  • Title

    Gettering effect of high-dose arsenic implantation and boron diffusion on gate oxide integrity in trench isolated high voltage silicon-on -insulator process

  • Author

    Lu, David H. ; Jimbo, Shinichi ; Fujishima, Naoto ; Wakimoto, Setsuko ; Ogino, Masaaki

  • Author_Institution
    Device Technol. Lab, Fuji Electr. Adv. Technol. Co., Ltd., Nagano, Japan
  • fYear
    2005
  • Firstpage
    684
  • Lastpage
    685
  • Keywords
    arsenic; boron; buried layers; electric breakdown; getters; ion implantation; isolation technology; power integrated circuits; semiconductor doping; silicon-on-insulator; surface diffusion; As; B; HVIC; Si-SiO2; bonded etched-back SOI wafers; buried oxide; dielectric breakdown; fully trench isolated high-voltage SOI; gate oxide integrity; gettering layout effects; high-dose implantation gettering effect; silicon-on-insulator process; surface diffusion; Boron; Design for quality; Dielectric breakdown; Etching; Gettering; Iron; Isolation technology; Silicon on insulator technology; Voltage; Wafer bonding;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Reliability Physics Symposium, 2005. Proceedings. 43rd Annual. 2005 IEEE International
  • Print_ISBN
    0-7803-8803-8
  • Type

    conf

  • DOI
    10.1109/RELPHY.2005.1493204
  • Filename
    1493204
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1654172