A hot-carrier triggered SCR for smart power bus ESD protection

Author

Watt, Jeffrey T. ; Walker, Andrew J.

Author_Institution

Cypress Semicond., San Jose, CA, USA

fYear

1995

Firstpage

341

Lastpage

344

Abstract

A hot-carrier triggered SCR (HCTSCR) has been developed for power bus electrostatic discharge (ESD) protection. Substrate current generated by hot electrons in an n-channel FET is used to latch an SCR structure connected between the power buses during an ESD event. A trigger circuit is used to control the hot-carrier generation such that the turn-on voltage of the HCTSCR is reduced during the fast voltage ramp characteristic of ESD. The turn-on voltage of the HCTSCR can be accurately tuned by adjusting the gate length of the trigger FET. The HCTSCR has been implemented in a 0.5 μm CMOS SRAM technology and has been demonstrated to provide protection against HBM ESD in excess of 8800 V without any degradation in latch-up

Keywords

CMOS integrated circuits; electrostatic discharge; hot carriers; power electronics; protection; thyristor applications; transient response; trigger circuits; 0.5 micron; 8800 V; CMOS SRAM technology; ESD protection; electrostatic discharge protection; hot-carrier triggered SCR; n-channel FET; smart power bus; substrate current; trigger circuit; CMOS technology; Electrons; Electrostatic discharge; FETs; Hot carriers; Latches; Power generation; Protection; Thyristors; Trigger circuits;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1995. IEDM '95., International

Conference_Location

Washington, DC

ISSN

0163-1918

Print_ISBN

0-7803-2700-4

Type

conf

DOI

10.1109/IEDM.1995.499210

Filename

499210