• DocumentCode
    1655018
  • Title

    Scalable progress verification in credit-based flow-control systems

  • Author

    Ray, Sayak ; Brayton, Robert K.

  • Author_Institution
    Dept. of EECS, Univ. of California, Berkeley, CA, USA
  • fYear
    2012
  • Firstpage
    905
  • Lastpage
    910
  • Abstract
    Formal verification of liveness properties of practical communication fabrics are generally intractable with present day verification tools. We focus on a particular type of liveness called `progress´ which is a form of deadlock freedom. An end-to-end progress property is broken down into localized safety assertions, which are more easily provable, and lead to a formal proof of progress. Our target systems are credit-based flow-control networks. We present case studies of this type and experimental results of progress verification of large networks using a bit-level formal verifier.
  • Keywords
    formal verification; multiprocessor interconnection networks; safety; system recovery; bit-level formal verifier; credit-based flow-control systems; deadlock freedom; end-to-end progress property; formal proof; localized safety assertions; practical communication fabrics; scalable progress verification; Algorithm design and analysis; Control systems; Fabrics; Hardware; Safety; Synchronization; System recovery;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design, Automation & Test in Europe Conference & Exhibition (DATE), 2012
  • Conference_Location
    Dresden
  • ISSN
    1530-1591
  • Print_ISBN
    978-1-4577-2145-8
  • Type

    conf

  • DOI
    10.1109/DATE.2012.6176626
  • Filename
    6176626