Title :
A winner-take-all network for large-scale analogue vector quantisers
Author :
Demosthenous, Andreas ; Taylor, John
Author_Institution :
Dept. of Electron. & Electr. Eng., Univ. Coll. London, UK
Abstract :
A BiCMOS scalable high-speed current-mode asynchronous Winner-Take-All (WTA) circuit is described. The proposed arrangement is well suited to applications requiring large WTA systems where operating speed and resolution are important parameters, for example, vector quantisation. The WTA has improved resolution and operating speed compared to other current-mode WTAs, especially for large M, where M is the number of inputs. The circuit is very economical in terms of power consumption and operates with 2.8 V supply rails
Keywords :
BiCMOS analogue integrated circuits; analogue processing circuits; vector quantisation; 2.8 V; BiCMOS scalable high-speed current-mode asynchronous winner-take-all circuit; analogue vector quantiser; power consumption; resolution; speed; Artificial neural networks; BiCMOS integrated circuits; Degradation; Educational institutions; Energy consumption; Large-scale systems; Power system economics; Rails; Vector quantization; Voltage;
Conference_Titel :
Circuits and Systems, 1998. ISCAS '98. Proceedings of the 1998 IEEE International Symposium on
Conference_Location :
Monterey, CA
Print_ISBN :
0-7803-4455-3
DOI :
10.1109/ISCAS.1998.704261
