Title :
Ant-Colony-Optimization based heuristic searching algorithm for cell assignment in a hybrid CMOS/nano circuits (CMOL) array
Author :
Chong Xu ; Nepal, Kundan
Author_Institution :
Sch. of Eng., Univ. of St. Thomas, St. Paul, MN, USA
Abstract :
In this paper, we focus on the placement of cells in a CMOL array given a specific connectivity domain using the Ant Colony Optimization algorithm. We describe the algorithm and using example circuit show that our approach provides a better placement than other recent work in terms of the number of buffers needed.
Keywords :
CMOS integrated circuits; ant colony optimisation; circuit optimisation; logic arrays; nanoelectronics; search problems; CMOL; ant-colony-optimization based heuristic searching algorithm; buffers; cell assignment; hybrid CMOS-nanocircuit array; specific connectivity domain; CMOS integrated circuits; Computer architecture; Field programmable gate arrays; Logic gates; Microprocessors; Nanoscale devices; Vectors;
Conference_Titel :
Nanotechnology (IEEE-NANO), 2014 IEEE 14th International Conference on
Conference_Location :
Toronto, ON
DOI :
10.1109/NANO.2014.6968071
