DocumentCode :
1656518
Title :
Low-power low-voltage library cells and memories
Author :
Piguet, Christian ; Masgonty, Jean-Marc ; Cserveny, Stefan ; Arm, Claude ; Pfister, Pierre-David
Author_Institution :
Centre Suisse d´´Electronique et de Microtechnique SA, Neuchatel, Switzerland
Volume :
3
fYear :
2001
fDate :
6/23/1905 12:00:00 AM
Firstpage :
1521
Abstract :
For future Systems on Chip (SoC) in deep submicron technologies, digital libraries as well as ROM and SRAM memories have to be designed to work at very low supply voltages and to be very robust while considering wire delays, signal input slopes, noise and crosstalk effects. New approaches are presented, such as libraries based on a limited set of standard cells and SRAM with split-bitlines and new asymmetrical RAM cells
Keywords :
VLSI; application specific integrated circuits; circuit CAD; circuit layout CAD; high level synthesis; integrated circuit design; integrated memory circuits; low-power electronics; random-access storage; ROM; SRAM memories; asymmetrical RAM cells; crosstalk effects; deep submicron technologies; digital libraries; low power SoC; low supply voltages; low-power library cells; low-power memories; low-power standard cell libraries; low-voltage library cells; low-voltage memories; noise; signal input slopes; split-bitline SRAM; systems on chip; wire delays; Crosstalk; Delay effects; Low voltage; Noise robustness; Random access memory; Read only memory; Signal design; Software libraries; System-on-a-chip; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Circuits and Systems, 2001. ICECS 2001. The 8th IEEE International Conference on
Print_ISBN :
0-7803-7057-0
Type :
conf
DOI :
10.1109/ICECS.2001.957504
Filename :
957504
Link To Document :
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