Dynamic power of CMOS gates driving lossy transmission lines

Author

Cappuccino, G. ; Corsonello, P. ; Cocorullo, G. ; Perri, S. ; Staino, G.

Author_Institution

Dept. of Electronics, Comput. Sci. & Syst., Calabria Univ., Italy

Volume

3

fYear

2001

fDate

6/23/1905 12:00:00 AM

Firstpage

1579

Abstract

The dynamic power consumption of a complementary metal-oxide-semiconductor (CMOS) gate driving a resistance-inductance-capacitance (RLC) transmission line is investigated in this paper. The closed-form solution for the dynamic power has been carried out by a simple time domain model for input impedance of a lossy transmission line, specifically developed to be used in conjunction with MOS macromodels. The proposed solution agrees with circuit simulations within 1% error for a wide range of line parameters, and it demonstrates how power dissipation localized in the wire resistance may be a significant aliquot of the global power consumption

Keywords

CMOS integrated circuits; circuit simulation; electric resistance; integrated circuit interconnections; integrated circuit modelling; time-domain analysis; transmission line theory; CMOS gates; MOS macromodels; RLC transmission line; circuit simulations; closed-form solution; dynamic power consumption; global power consumption; input impedance; localized power dissipation; lossy transmission lines; resistance-inductance-capacitance transmission line; time domain model; wire resistance; Circuit simulation; Closed-form solution; Distributed parameter circuits; Energy consumption; Impedance; Power dissipation; Power transmission lines; Propagation losses; Semiconductor device modeling; Wire;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits and Systems, 2001. ICECS 2001. The 8th IEEE International Conference on

Print_ISBN

0-7803-7057-0

Type

conf

DOI

10.1109/ICECS.2001.957518

Filename

957518