Novel, high-performance polysilicon heterostructure TFTs using P-I-N source/drains

We have demonstrated improvement of ON/OFF ratio and reduction of leakage current in polysilicon thin film transistors by (a) inserting a thin polycrystalline silicon-germanium layer in the middle of the channel to confine the carriers away from the highly defective polysilicon/silicon-dioxide interface by using the bandgap offset in the valence band, and (b) introducing near-intrinsic regions at the source/drain ends of the channel to reduce the peak lateral electric field in the channel, thereby reducing field emission through grain boundaries