DocumentCode
1657508
Title
An area-saving 3-dimensional decoder structure for ROMs
Author
Wang, Chua ; Hsueh, Ya-Hsin ; Chen, Yzng-Pei
Author_Institution
Dept. of Electr. Eng., Nat. Sun Yat-Sen Univ., Kaohsiung, Taiwan
Volume
2
fYear
2001
fDate
6/23/1905 12:00:00 AM
Firstpage
573
Abstract
ROMs (read-only memory) are widely used in both digital communication systems and daily consumer electronics. The major functions of ROMs are storage of data, program, firmware, etc. In this work, an area-saving decoder structure for ROMs is proposed. The stages of address decoding are drastically shortened owing to the 3-dimensional decoding method employed. A real 256×8 ROM possessing the proposed decoder is physically fabricated by 0.5 μm 2P2M CMOS technology
Keywords
CMOS memory circuits; decoding; read-only storage; 0.5 micron; 3-dimensional decoder structure; CMOS technology; ROMs; address decoding; area-saving decoder structure; CMOS technology; Circuits; Clocks; Decoding; Digital communication; MOS devices; MOSFETs; Read only memory; Signal generators; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits and Systems, 2001. ICECS 2001. The 8th IEEE International Conference on
Print_ISBN
0-7803-7057-0
Type
conf
DOI
10.1109/ICECS.2001.957541
Filename
957541
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