• DocumentCode
    1657571
  • Title

    The Design of an 8-Bit CISC CPU Based on FPGA

  • Author

    Zhang, Yunjie ; Bao, Lei

  • Author_Institution
    Electron. & Inf. Eng. Dept., Tianjin Inst. of Urban Constr., Tianjin, China
  • fYear
    2011
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    With the development of FPGA, the design of digital electronic circuits has entered a new era, which make it possible for designers to customize their own special CPU. So it is a great significance to design an economic and applicable CPU core based on FPGA for the cost reduction and the possession of intellectual property. Based on the relevant knowledge on the principles of computer composition, the paper designed and implemented an 8-bit CISC CPU by using top-down approach, completed all of the functional modules using the hardware description language VHDL and EDA technology. It is designed, compiled and simulated under the integrated development environment of Quartus II, and after that it is downloaded to the FPGA experimental platform for units and system testing. Finally, the validity of the design was verified and the simulation result of test program for the designed CPU is presented. The experiment result shows that the functional modules are successful in performing their individual functions, and the CPU as a whole can correctly execute all of the instructions. Thereby, it proves to achieve the goal as formerly designed. The research of this paper makes contributions to the design of the more complex CPU based on FPGA and readers may refer to it according to their demands.
  • Keywords
    computer architecture; field programmable gate arrays; hardware description languages; instruction sets; logic design; 8-Bit CISC CPU design; CPU core; EDA technology; FPGA development; FPGA experimental platform; Quartus II; VHDL technology; complex instruction set computer; computer composition; cost reduction; digital electronic circuits; functional modules; hardware description language; intellectual property; system testing; test program; top-down approach; Central Processing Unit; Computers; Field programmable gate arrays; Hardware; Random access memory; Registers; Timing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Wireless Communications, Networking and Mobile Computing (WiCOM), 2011 7th International Conference on
  • Conference_Location
    Wuhan
  • ISSN
    2161-9646
  • Print_ISBN
    978-1-4244-6250-6
  • Type

    conf

  • DOI
    10.1109/wicom.2011.6040633
  • Filename
    6040633