DocumentCode
1657881
Title
RtrASSoc: an adaptable superscalar reconfigurable system-on-chip. The simulator
Author
Silva, J.L. ; Costa, R.M. ; Jorge, G.H.R.
Author_Institution
Fundacao de Ensino Euripides Soares da Rocha, Programa de Pos-Graduaco em Ciencia da Computacao, Marilia, Brazil
fYear
2003
Firstpage
196
Lastpage
200
Abstract
This paper describes the purpose of development for RtrASSoc, an Adaptable, Superscalar and Reconfigurable System on Chip. The RtrASSoc will be used in Embedded Systems that need capacity, performance, and low cost, based on Programmable System-on-Chip (PSOC), where part of the system will be a embedded superscalar processor (ESP), another part will be a Embedded Operating System (EOS), and finally a reconfigurable part where a reconfigurable routines (RR) can be reconfigured, extracted from the application program. A C-compiler extracts the reconfigurable routines from the application program and fix the parameters for reconfiguration that will be used during the execution of the application. The system will be tested in recognition pattern applications in a FPGA Virtex from Xilinx.
Keywords
embedded systems; microprocessor chips; microprogramming; operating systems (computers); program compilers; reconfigurable architectures; system-on-chip; C-compiler; EOS; ESP; PSOC; RR; RtrASSoc; adaptable superscalar reconfigurable system-on-chip; application program; embedded operating system; embedded superscalar processor; embedded system; programmable system-on-chip; recognition pattern application; reconfigurable routine; Computational modeling; Costs; Earth Observing System; Electrostatic precipitators; Embedded system; Field programmable gate arrays; Operating systems; Pattern recognition; System testing; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
System-on-Chip for Real-Time Applications, 2003. Proceedings. The 3rd IEEE International Workshop on
Print_ISBN
0-7695-1944-X
Type
conf
DOI
10.1109/IWSOC.2003.1213034
Filename
1213034
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