Re-examination of indium implantation for a low power 0.1 μm technology

Author

Bouillon, P. ; Bénistant, F. ; Skotnicki, T. ; Guégan, G. ; Roche, D. ; André, E. ; Mathiot, D. ; Tedesco, S. ; Martin, F. ; Heitzmann, M. ; Lerme, M. ; Haond, M.

Author_Institution

GRESSI, FT, CNET, Meylan, France

fYear

1995

Firstpage

897

Lastpage

900

Abstract

The use of indium for NMOS channel doping in a 0.1 μm CMOS technology is fully re-considered. For the first time, we clearly demonstrate that the room temperature carrier freeze-out is responsible for large discrepancies between spreading resistance and SIMS measurements but that it does not affect Indium doped NMOSFET´s operation. 0.1 μm NMOS transistors have been fabricated using Indium for channel doping. A strong reduction in short channel effect and a slight improvement in the effective low-field mobility have been obtained

Keywords

CMOS integrated circuits; MOSFET; carrier mobility; indium; ion implantation; 0.1 micron; CMOS technology; In channel doping; In implantation; NMOS channel doping; NMOSFET; SIMS measurements; Si:In; low power deep-submicron technology; low-field mobility; room temperature carrier freeze-out; short channel effect reduction; spreading resistance; Atomic measurements; Boron; CMOS technology; Doping; Indium; MOS devices; MOSFETs; Silicon; Strontium; Temperature;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1995. IEDM '95., International

Conference_Location

Washington, DC

ISSN

0163-1918

Print_ISBN

0-7803-2700-4

Type

conf

DOI

10.1109/IEDM.1995.499361

Filename

499361