Title :
Speculative network processor for quality-of-service-aware protocol processing
Author_Institution :
Inst. of Comput. Eng., Luebeck Univ., Germany
Abstract :
Current network processors (NPs) are VLSI-devices dedicated to high-speed packet forwarding. While their architectures are optimized for high throughput rates, they normally disregard protocol-processing delays which result from data dependencies inherent to encapsulated protocol-layers. The key to overcome this limitation is to speculatively dissolve these dependencies and to allow an accelerated control-path processing. This work comprises the entire framework of a speculative NP conception, implementation and evaluation. Besides a generic evaluation, the benefit of the system is shown by system simulation. Utilizing the approach, a latency reduction of up to 14.9% can be achieved compared to traditional implementations.
Keywords :
VLSI; microprocessor chips; optimisation; packet switching; protocols; quality of service; VLSI devices; accelerated control-path processing; data dependencies; encapsulated protocol-layers; generic evaluation; high-speed packet forwarding; latency reduction; protocol-processing delays; quality-of-service-aware protocol processing; speculative network processor; system simulation; Acceleration; Computer architecture; Computer networks; Delay; Integrated circuit technology; Multithreading; Protocols; Reduced instruction set computing; Throughput; Yarn;
Conference_Titel :
Network Computing and Applications, 2004. (NCA 2004). Proceedings. Third IEEE International Symposium on
Print_ISBN :
0-7695-2242-4
DOI :
10.1109/NCA.2004.1347779