Title :
A new model for predicting the effect of temperature and devices dimension on threshold voltage of PMOS in VLSI
Author :
Ruangphanit, A. ; Poyai, A. ; Sakuna, N. ; Niemcharoen, S. ; Muanghlua, R.
Author_Institution :
Dept. of Electron. Eng., King Mongkut´s Inst. of Technol., Bangkok, Thailand
Abstract :
This paper presents a new model for predicting the effect of temperature and the devices dimension on the threshold voltage of PMOS. Temperature-dependent models have been developed including the temperature affect of surface potentials, intrinsic carrier concentration and energy band gap. The developed models have been used to study the temperature dependent and narrow channel width on the threshold voltage of PMOS. The new temperature coefficient for threshold voltage and the body-bias coefficient of threshold voltage of a big PMOS and a narrow channel width of MOSFET are proposed. The model can be implemented in simulation tools with the error is less than 3%.
Keywords :
MOS integrated circuits; VLSI; carrier density; integrated circuit modelling; thermal analysis; MOSFET; PMOS; VLSI; body-bias coefficient; channel width; device dimension; energy band gap; intrinsic carrier concentration; temperature affect; temperature coefficient; temperature-dependent models; threshold voltage; very large scale integration; MOSFET; Predictive models; Temperature measurement; Temperature sensors; Testing; Threshold voltage; MOSFET; Threshold voltage;
Conference_Titel :
Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology (ECTI-CON), 2015 12th International Conference on
Conference_Location :
Hua Hin
DOI :
10.1109/ECTICon.2015.7206949
