Fixed point digital predistortion system based on indirect learning architecture

In this paper, we analyze the effects of fixed point (FXP) implementation on digital predistortion (DPD) system based on indirect learning architecture (ILA). Unlike the conventional floating point implementation, in FXP ILA the digital predistorter (PD) and the coefficient estimation algorithm are implemented in FXP arithmetic. We quantify the impact of this FXP implementation on the overall performance of the DPD system so that we can achieve good linearity performance with minimum number of bits for data, coefficients and arithmetic operations. The performance of the FXP DPD system is evaluated in terms of adjacent channel power ratio (ACPR) and error vector magnitude (EVM) at the output of PA when a Long Term Evolution-Advanced (LTE-Advanced) signal is applied at the input. The reference PA model used for simulation is the Wiener model and the PD has been modeled as a memory polynomial model.