Title :
Threshold-gates in arithmetic circuits
Author :
Burwick, Christian ; Thomas, Marc ; Dienstuhl, Jan ; Goser, Karl F.
Author_Institution :
Dept. for Microelectron., Dortmund Univ., Germany
fDate :
6/23/1905 12:00:00 AM
Abstract :
In this paper the design of digital CMOS threshold logic circuits for low power applications is investigated. Two different basic elements for threshold circuits are presented. These circuits are characterized with regard to power and speed. More complex functions, i.e. a 1-bit full adder and an 8-bit carry-lookahead adder are given. Moreover an approach for the determination of the W/L-ratios for the transistors with an evolutionary algorithm is discussed
Keywords :
CMOS logic circuits; adders; circuit optimisation; digital arithmetic; evolutionary computation; integrated circuit design; logic design; logic gates; low-power electronics; threshold logic; 1 bit; 8 bit; CMOS digital threshold logic circuit; W/L-ratio; arithmetic circuit; carry-lookahead adder; circuit optimization; evolutionary algorithm; full adder; low power design; threshold gate; Adders; Arithmetic; Boolean functions; CMOS digital integrated circuits; CMOS logic circuits; Evolutionary computation; Flip-flops; Logic circuits; Microelectronics; Power dissipation;
Conference_Titel :
Electronics, Circuits and Systems, 2001. ICECS 2001. The 8th IEEE International Conference on
Print_ISBN :
0-7803-7057-0
DOI :
10.1109/ICECS.2001.957620
