DocumentCode :
1660274
Title :
An area efficient implementation of a cellular neural network
Author :
Lai, K.K. ; Leong, P.H.W.
Author_Institution :
Dept. of Electr. Eng., Sydney Univ., NSW, Australia
fYear :
1995
Firstpage :
51
Lastpage :
54
Abstract :
A time multiplexing scheme for implementing cellular neural networks (CNN) is described. This scheme makes it possible to realise much higher density implementations of CNNs in VLSI circuits. A circuit implementation of this technique is presented along with simulation results
Keywords :
VLSI; cellular logic; cellular neural nets; circuit analysis computing; edge detection; neural chips; VLSI circuits; area efficient implementation; cellular neural network; edge detection; higher density implementations; neural circuits; simulation; time multiplexing scheme; Cellular neural networks; Circuit simulation; Equations; Feedback circuits; Image edge detection; Image processing; Neural networks; Output feedback; Software performance; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Artificial Neural Networks and Expert Systems, 1995. Proceedings., Second New Zealand International Two-Stream Conference on
Conference_Location :
Dunedin
Print_ISBN :
0-8186-7174-2
Type :
conf
DOI :
10.1109/ANNES.1995.499437
Filename :
499437
Link To Document :
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