Cascaded feedforward sigma-delta modulator for wide bandwidth applications

Author

Chiang, Jen-Shiun ; Chou, Pou-Chu ; Chang, Teng-Hung

Author_Institution

Tamkang Univ., Taipei, Taiwan

Volume

2

fYear

2001

fDate

6/23/1905 12:00:00 AM

Firstpage

1039

Abstract

In this paper, we propose a cascaded feedforward sigma-delta modulator for wide bandwidth applications. In our proposed approach, we use a 1.5-bit quantizer as feedback in the multi-bit sigma-delta modulator. The 1.5-bit feedback may cause coarse quantization errors, however the error can be canceled in the digital part. Here an adaptive filter with least mean square algorithm is used to reduce the nonlinear effect. The simulation results show that the SNDR of this architecture is very close to that of the ideal feedforward summation sigma-delta modulator with multi-bit DAC and can be used for the wide bandwidth application

Keywords

VLSI; adaptive filters; cascade networks; circuit simulation; integrated circuit design; least mean squares methods; sigma-delta modulation; 1.5-bit quantizer; adaptive filter; cascaded feedforward sigma-delta modulator; feedforward summation; least mean square algorithm; multi-bit DAC; multi-bit sigma-delta modulator; nonlinear effect; quantization errors; simulation; wide bandwidth application; wide bandwidth applications; Adaptive filters; Analog circuits; Analog-digital conversion; Bandwidth; Delta-sigma modulation; Digital circuits; Feedback; Frequency; Least mean square algorithms; Quantization;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics, Circuits and Systems, 2001. ICECS 2001. The 8th IEEE International Conference on

Print_ISBN

0-7803-7057-0

Type

conf

DOI

10.1109/ICECS.2001.957661

Filename

957661