DocumentCode
1660626
Title
Compression of VLSI test data by arithmetic coding
Author
Hashempour, H. ; Lombardi, F.
Author_Institution
Dept. of ECE, Northeastern Univ., Boston, MA, USA
fYear
2004
Firstpage
150
Lastpage
157
Abstract
This work presents arithmetic coding and its application to data compression for VLSI testing. The use of arithmetic codes for compression results in a codeword whose length is close to the optimal value as predicted by entropy in information theory. Previous techniques (such as those based on Huffman or Golomb coding) result in optimal codes for test data sets in which the probability model of the symbols satisfies specific requirements. We show that Huffman and Golomb codes result in large differences between entropy bound and sustained compression. We present compression results of arithmetic coding for circuits through a practical integer implementation of arithmetic coding/decoding and analyze its deviation from the entropy bound as well. A software implementation approach is proposed and studied in detail using industrial embedded DSP cores.
Keywords
VLSI; arithmetic codes; automatic test equipment; decoding; entropy codes; integrated circuit testing; logic testing; ATE; Golomb coding; Huffman coding; VLSI testing; arithmetic coding; arithmetic decoding; compression ratio; embedded DSP cores; entropy bound; information theory; optimal value codeword length; software implementation; test data compression; Arithmetic; Circuit testing; Computer industry; Data compression; Decoding; Digital signal processing; Embedded software; Entropy; Information theory; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Defect and Fault Tolerance in VLSI Systems, 2004. DFT 2004. Proceedings. 19th IEEE International Symposium on
ISSN
1550-5774
Print_ISBN
0-7695-2241-6
Type
conf
DOI
10.1109/DFTVS.2004.1347835
Filename
1347835
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