DocumentCode
1660653
Title
Data integrity evaluations of Reed Solomon codes for storage systems [solid state mass memories]
Author
Cardarilli, G.C. ; Ottavi, M. ; Pontarelli, S. ; Re, M. ; Salsano, A.
Author_Institution
Dept. of Electron. Eng., Rome Univ., Italy
fYear
2004
Firstpage
158
Lastpage
164
Abstract
This paper introduces a very flexible approach for the evaluation of bit error rates (BER) attainable on storage systems which use Reed Solomon codes. These evaluations are based on the use of a Markov model to evaluate the probabilities of having an uncorrectable codeword. Differently from previous literature, the reported approach can take into account the impact of both erasures and random errors, allowing a smaller degree of approximation and better evaluation of BER improvement related to the introduction of scrubbing techniques. The flexibility of the proposed method is finally shown by applying it to different cases of interest.
Keywords
Markov processes; Reed-Solomon codes; error correction codes; error detection codes; error statistics; semiconductor storage; BER; EDAC; Markov model; Reed Solomon codes; SSMM data integrity; bit error rates; erasure errors; error detection/correction codes; random errors; scrubbing techniques; solid state mass memories; storage systems; uncorrectable codeword probability; Bit error rate; Delay; Error correction codes; Instruments; Nonvolatile memory; Power system transients; Reed-Solomon codes; Semiconductor memory; Solid state circuits; Space missions;
fLanguage
English
Publisher
ieee
Conference_Titel
Defect and Fault Tolerance in VLSI Systems, 2004. DFT 2004. Proceedings. 19th IEEE International Symposium on
ISSN
1550-5774
Print_ISBN
0-7695-2241-6
Type
conf
DOI
10.1109/DFTVS.2004.1347836
Filename
1347836
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