Title :
Arithmetic error analysis of a new reciprocal cell
Author :
Jain, Vijay K. ; Perez, Gibert E. ; Swartzlander, Earl E., Jr.
Author_Institution :
Dept. of Electr. Eng., Univ. of South Florida, Tampa, FL, USA
Abstract :
The arithmetic error of a fast reciprocal 16-b cell is analyzed. This VLSI cell computes the result in two clock cycles by the use of a very small ROM table and innovative second-order interpolation. The reliability of the predictive formulas (for the arithmetic errors of the cell) is demonstrated by comparing the predictions with computer simulation results. The methodology outlined can easily be extended to other VLSI cells
Keywords :
VLSI; digital arithmetic; digital simulation; interpolation; 16-b cell; VLSI cell; arithmetic error analysis; computer simulation; reciprocal cell; second-order interpolation; very small ROM table; Clocks; Computer errors; Computer simulation; Digital arithmetic; Error analysis; Interpolation; Polynomials; Read only memory; Signal processing; Very large scale integration;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1992. ICCD '92. Proceedings, IEEE 1992 International Conference on
Conference_Location :
Cambridge, MA
Print_ISBN :
0-8186-3110-4
DOI :
10.1109/ICCD.1992.276197
