DocumentCode :
1661337
Title :
At-speed functional verification of programmable devices
Author :
Bombieri, Nicola ; Fummi, Franco ; Pravadelli, Graziano
Author_Institution :
Dipt. di Inf., Verona Univ., Italy
fYear :
2004
Firstpage :
386
Lastpage :
394
Abstract :
In this paper we present a novel approach for functional verification of programmable devices. The proposed methodology is suited to refine the results obtained by a functional automatic test pattern generator (ATPG). The hard-to-detect faults are examined by exploiting the controllability ability of a high-level ATPG in conjunction with the observability potentiality of software instructions targeted to the programmable device. Generated test programs can be used for both functional verification and at-speed testing.
Keywords :
automatic test pattern generation; fault location; integrated circuit testing; logic testing; programmable logic devices; system-on-chip; SoC embedded programmable devices; at-speed functional verification; at-speed testing; controllability; functional automatic test pattern generator; hard-to-detect faults; high-level ATPG; observability potentiality; programmable devices; software instructions; test programs; Automatic test pattern generation; Automatic testing; Built-in self-test; Controllability; Logic devices; Logic testing; Software testing; Switches; System testing; Test pattern generators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Defect and Fault Tolerance in VLSI Systems, 2004. DFT 2004. Proceedings. 19th IEEE International Symposium on
ISSN :
1550-5774
Print_ISBN :
0-7695-2241-6
Type :
conf
DOI :
10.1109/DFTVS.2004.1347863
Filename :
1347863
Link To Document :
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