DocumentCode
1661461
Title
Application of SEMATECH Defect Model to a 0.6 μm process defect reduction
Author
Saha, Sujit ; Mittal, Sanjiv ; McDonald, Chris
Author_Institution
Intel Corp., Santa Clara, CA, USA
fYear
1994
Firstpage
273
Abstract
Summary form only given. This paper will describe the application of the SEMATECH Defect Model for setting equipment level goals for a new 8" process technology at the inception of the process development. The paper will also show how the model validation was made using a similar process and sort yield visual data, how those goals were used to drive equipment team level improvements and resulting die yield impacts. We will also show how the model results can be used to prioritize competing improvement projects for the highest overall output
Keywords
semiconductor process modelling; 0.6 micron; 8 in; SEMATECH defect model; defect reduction; die yield; equipment level; process development; process technology; semiconductor industry; sort visual data; Conference management; Costs; Educational institutions; Electronics industry; Predictive models; Production facilities; Semiconductor device manufacture; Strategic planning; Virtual manufacturing;
fLanguage
English
Publisher
ieee
Conference_Titel
Advanced Semiconductor Manufacturing Conference and Workshop. 1994 IEEE/SEMI
Conference_Location
Cambridge, MA
Print_ISBN
0-7803-2053-0
Type
conf
DOI
10.1109/ASMC.1994.588271
Filename
588271
Link To Document