• DocumentCode
    1661473
  • Title

    IEEE 1992 International Conference on Computer Design: VLSI in Computers and Processors. ICCD ´92 (Cat. No.92CH3189-8)

  • fYear
    1992
  • Abstract
    The following topics were dealt with: embedded systems; synthesis for testability; timing analysis and optimization; design and test of multichip modules; VLSI design; routing and mapping in field-programmable gate arrays; computer arithmetic; computer-based systems; system-level testing; logic synthesis for field-programmable gate arrays; special-purpose architectures; interconnect; CPUs; system-level verification and test; built-in self-test; timed asynchronous circuits; scheduling in high level synthesis; NVAX chip; sequential synthesis; asynchronous architectures; test generation and fault simulation; floor planning and layout; asynchronous control circuits; message-driven processors; verification, validation and test; logic synthesis; fault tolerant and self-checking circuits; special-purpose systems; circuit- and switch-level simulation; formal verification; high-level-CAD environments; memory design; memory self-testing and repair
  • Keywords
    CAD/CAM; VLSI; built-in self test; circuit layout CAD; logic CAD; real-time systems; CPUs; NVAX chip; VLSI design; asynchronous architectures; asynchronous control circuits; built-in self-test; circuit level simulation; computer arithmetic; computer-based systems; design and test; embedded systems; fault simulation; fault tolerant circuits; field-programmable gate arrays; floor planning; formal verification; high level synthesis; high-level-CAD environments; interconnect; layout; logic synthesis; mapping; memory design; memory self-testing and repair; message-driven processors; multichip modules; optimization; routing; scheduling; self-checking circuits; sequential synthesis; special-purpose architectures; special-purpose systems; switch-level simulation; synthesis for testability; system-level testing; system-level verification; test generation; timed asynchronous circuits; timing analysis; validation;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design: VLSI in Computers and Processors, 1992. ICCD '92. Proceedings, IEEE 1992 International Conference on
  • Conference_Location
    Cambridge, MA, USA
  • Print_ISBN
    0-8186-3110-4
  • Type

    conf

  • DOI
    10.1109/ICCD.1992.276217
  • Filename
    276217